The present invention generally relates to lithographic patterning of a semiconductor substrate and more particularly to a mask for lithographic patterning of a semiconductor substrate and a method of manufacturing the same.
With continuous demand to increase the integration density of integrated circuits, new lithography techniques such as electron beam lithography or X-ray beam lithography are now under intensive study. According to such a new lithography technique, a fine patterning with a pattern size of 1 .mu.m or less can be achieved easily.
In the electron beam lithography, a mask having an aperture for passing an electron beam according to a predetermined pattern is used for shaping the electron beam. In using such a mask, it is required that the mask is manufactured easily with high precision. Further, a mask is required that it can be used repeatedly.
FIG. 1 shows a typical prior art mask used for electron beam lithography as viewed from a bottom side thereof. Referring to the drawing, the mask comprises a base body 1 of silicon and there are provided a plurality of pattern regions 2 such as the regions 2a-2f each having a size of about 300.times.300 .mu.m. In the pattern regions 2, a plurality of apertures 3a-3f are formed respectively according to desired beam shapes. Further, there are provided a plurality of reinforcement ribs 4a-4c on the base body 1 so as to surround the pattern regions 2a-2f to provide a rigidity thereto. The pattern regions 2a-2f generally have an extremely small thickness in the order of 1 .mu.m or less because of the reason to be described and because of this, the pattern regions have to be reinforced by the reinforcement ribs 4a-4c.
In such a prior art mask, however, use of the reinforcement ribs decreases the number of the pattern regions which can be provided on the mask. Further, such a rib makes the manufacturing of the mask extremely difficult or even unrealistic. In other words, the mask with a structure as shown in FIG. 1 is virtually impossible to construct with reliability for practical use. When the ribs are omitted, on the other hand, the number of pattern regions on the mask is reduced to only one and the efficiency of the patterning process is significantly reduced as the mask has to be replaced each time the pattern to be written on the substrate is changed. Note that one pattern region can carry only one pattern, if not provided with such reinforcement, because of the reduced size of the pattern region.
In such a prior art mask, there is a further problem in that the thin mask region, being irradiated by the high energy electron beam, tends to be heated. When such heating occurs, the mask region is easily deformed and the pattern transferred on the semiconductor substrate is deformed. It is needless to mention the difficulty in handling such a fragile mask. Further, because of the reduced thickness of the pattern regions, some of the electron beams are passed through the pattern regions with substantial scattering, and thus there arises another problem in which the contour of the image transferred on the semiconductor substrate is blurred.
Conventionally, the mask shown in FIG. 1 is formed by a series of doping and etching processes as shown in FIGS. 2(A)-(D). In these drawings, the reinforcement ribs are omitted for the sake of simplicity.
Referring to FIG. 2(A), a silicon base body 1 is prepared with a thickness of about 500 .mu.m such that the base body has a (100) top surface 1a and a (100) bottom surface 1b. In a next step of FIG. 2(B), the top surface 1a is doped with boron by ion implantation and a boron-doped region 1c is formed. As the region 1c is formed by the ion implantation, the thickness of the region 1c is very thin in the order of a few hundred nanometers in the maximum, typically about 0.2 .mu.m. Next, the bottom surface 1b of the base body 1 is etched in a solution of potassium hydroxide (KOH) whereby a (111) plane of silicon is preferentially etched and a space 5 as shown in FIG. 2(C) is formed. Note that the etching of silicon by KOH is stopped at the boron-doped region 1c because of the reduced etching rate. Further, the boron-doped region 1c is patterned and a structure shown in FIG. 2(D) is obtained.
It will now be understood the reason why the thickness of the pattern region 2 has been so small in the prior art mask. Associated with the formation of the region 1c by doping, there arises another problem in that the lower boundary of the boron-doped region 1c is not flat. In other words, there is some undulation in the lower boundary of the region 1c as shown in FIG. 2(E). Such an undulation of the doped region is usually negligible in the manufacturing of integrated circuits as the lateral extent of such a doped region in the semiconductor device is uncomparably small. In the case of the mask, however, the lateral extent of such a region is in the order of several hundred microns to several millimeters and thus the pattern region 2 can have a substantial variation in the thickness. Such a variation can provide a substantial effect on the patterning process such as a change in the focusing of the electron beam on the semiconductor substrate.
Further, associated with the undulation of the lower boundary of the doped region 1c, there arises a still other problem in that the size of the aperture formed in a part of the pattern region 2 having a reduced thickness tends to be enlarged as compared to the apertures in a thick part because of the excessive etching.